SherbyNet - /page/wikibook/entry.mu

Micron Document

<!DOCTYPE html>

<title>Task Control Block</title>

</head>

<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Task Control Block</span></span>

</h1>

</header>

/* start https://en.wikipedia.org/ */

.mw-parser-output .hatnote{font-style:italic}.mw-parser-output div.hatnote{padding-left:1.6em;margin-bottom:0.5em}.mw-parser-output .hatnote i{font-style:normal}.mw-parser-output .hatnote+link+.hatnote{margin-top:-0.5em}@media print{body.ns-0 .mw-parser-output .hatnote{display:none!important}}

/* end https://en.wikipedia.org/ */

</style><div role="note" class="hatnote navigation-not-searchable">For the equivalent in Unix-derived systems, see <a href="Thread_control_block" title="Thread control block">Thread control block</a>.</div>

<p>The <b>Task Control Block</b> (<b>TCB</b>) contains the state of a task<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>a<span class="cite-bracket">]</span></a></sup> in, e.g., <a href="OS/360_and_successors" title="OS/360 and successors">OS/360 and successors</a> on <a href="IBM_System/360_architecture" title="IBM System/360 architecture">IBM System/360 architecture</a> and successors.

</p>

<div class="mw-heading mw-heading2"><h2 id="The_TCB_in_OS/360_and_successors">The TCB in OS/360 and successors</h2></div>

<p>In <a href="OS/360" class="mw-redirect" title="OS/360">OS/360</a>, <a href="OS/VS1" title="OS/VS1">OS/VS1</a>, <a href="OS/VS2_(SVS)" title="OS/VS2 (SVS)">SVS</a>, <a href="MVS/370" class="mw-redirect" title="MVS/370">MVS/370</a>, <a href="MVS/XA" class="mw-redirect" title="MVS/XA">MVS/XA</a>, <a href="MVS/ESA" class="mw-redirect" title="MVS/ESA">MVS/ESA</a>, <a href="OS/390" title="OS/390">OS/390</a> and <a href="Z/OS" title="Z/OS">z/OS</a>, the TCB<sup id="cite_ref-FixSup_2-0" class="reference"><a href="#cite_note-FixSup-2"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-MVTSup_3-0" class="reference"><a href="#cite_note-MVTSup-3"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-SCB_4-0" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 311–321">: 311–321 </span></sup> contains, among other data, non-dispatchability flags and the general and floating point registers for a task that is not currently assigned to a CPU.

</p><p>A TCB provides an anchor for a linked list of other, related request blocks<sup id="cite_ref-SCB_4-1" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 269–301">: 269–301 </span></sup> (RBs); the top-linked RB for a TCB contains the <a href="Program_status_word" title="Program status word">Program status word</a> (PSW) when the task is not assigned to a CPU.

</p><p>When the control program's dispatcher selects a TCB to be dispatched, the dispatcher loads registers from the TCB and loads the PSW from the top RB of the TCB, thereby dispatching the unit of work.

</p>

<div class="mw-heading mw-heading3"><h3 id="Request_Blocks">Request Blocks</h3></div>

<p>OS/360 has the following types of request blocks

</p>

<dl><dt>Interruption Request Block<sup id="cite_ref-SCB_4-2" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 281–284">: 281–284 </span></sup></dt>

<dd>An IRB is used to handle an asynchronous exit.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>b<span class="cite-bracket">]</span></a></sup></dd>

<dt>Program Request Block<sup id="cite_ref-SCB_4-3" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 285–287">: 285–287 </span></sup></dt>

<dd>A PRB represents a module invoked with an ATTACH macro, a LINK macro or a synchronous exit.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>c<span class="cite-bracket">]</span></a></sup></dd>

<dt>System Interruption Request Block<sup id="cite_ref-SCB_4-4" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 289–291">: 289–291 </span></sup></dt>

<dd>An SIRB is used to run I/O error recovery code.</dd>

<dt>Supervisor Request Blocks<sup id="cite_ref-SCB_4-5" class="reference"><a href="#cite_note-SCB-4"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup class="reference nowrap"><span title="Pages: 293–301">: 293–301 </span></sup></dt>

<dd>An SVRB represents the execution of a Type 2, Type 3 or Type 4 SVC routine</dd></dl>

<p>An RB contains several fields, among them an old PSW, old general registers, a PSW and a wait count.

</p>

<div class="mw-heading mw-heading3"><h3 id="Dispatching">Dispatching</h3></div>

<p>The <i>Dispatcher</i> is a routine in the nucleus that selects the work to be dispatched. It selects the highest priority task that:

</p>

<ol><li>Is not running on another CPU</li>

<li>Does not have any non-dispatchability flags set</li>

<li>Has a top RB with a zero wait count.</li></ol>

<p>The system maintains a pair<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>d<span class="cite-bracket">]</span></a></sup> of TCB pointers known as TCB old and TCB new. A TCB new pointer of zero causes the dispatcher to search for an eligible task.

</p><p>When the dispatcher finds an eligible task, it sets the old and new TCB pointers. loads the registers from the TCB and loads the PSW from the top RB.

</p><p>If the dispatcher fails to find eligible work, it enters an enabled wait.

</p>

<div class="mw-heading mw-heading2"><h2 id="History">History</h2></div>

<p>With the introduction of <a href="MVS/370" class="mw-redirect" title="MVS/370">MVS/370</a> and successor systems, a whole new environment was introduced: the Service Request Block (SRB), which generally has a higher priority than any Task Control Block, and, indeed, which itself has two distinct priorities: a Global SRB (priority over all local address space SRBs and TCBs) and a Local SRB (priority over only the local address space TCBs); and MVS's dispatcher must manage all of these with absolute consistency across as many as two processors (MVS/370) and as many as sixteen processors (successor systems).

</p>

<ul><li><a href="OS/360_and_successors" title="OS/360 and successors">OS/360 and successors</a></li>

<li><a href="Thread_control_block" title="Thread control block">Thread control block</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2></div>

/* start https://en.wikipedia.org/ */

.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}

/* end https://en.wikipedia.org/ */

</style><div class="reflist reflist-lower-alpha">

<li id="cite_note-1"><span class="mw-cite-backlink"><b><a href="#cite_ref-1">^</a></b></span> <span class="reference-text">Roughly analogous to a <a href="Thread_(computing)" title="Thread (computing)">thread</a> in <a href="UNIX" class="mw-redirect" title="UNIX">UNIX</a>-like operating systems.</span>

</li>

<li id="cite_note-5"><span class="mw-cite-backlink"><b><a href="#cite_ref-5">^</a></b></span> <span class="reference-text">An asynchronous routine to handle an exception, timer event or other signal.</span>

</li>

<li id="cite_note-6"><span class="mw-cite-backlink"><b><a href="#cite_ref-6">^</a></b></span> <span class="reference-text">Unprivileged <a href="Callback_(computer_programming)" title="Callback (computer programming)">callback</a> routine.</span>

</li>

<li id="cite_note-7"><span class="mw-cite-backlink"><b><a href="#cite_ref-7">^</a></b></span> <span class="reference-text">In <a href="65MP" class="mw-redirect" title="65MP">65MP</a> there is a pair for each CPU; in MVS there are pointers for each address space.</span>

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

/* start https://en.wikipedia.org/ */

.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("./mw/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("./mw/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("./mw/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("./mw/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}

/* end https://en.wikipedia.org/ */

</style><cite class="citation book cs1"><a rel="nofollow" class="external text" href="http://www.bitsavers.org/pdf/ibm/360/os/plm_1966-67/Y28-6612-2_Fixed-Task_Supervisor_PLM_Sep67.pdf"><i>IBM System/360 Operating System - Fixed-Task Supervisor - Program Number 360S-CI-505</i></a> <span class="cs1-format">(PDF)</span>. Program Logic (Third ed.). February 1967. Y28-6612-2.</cite></span>

</li>

<li id="cite_note-MVTSup-3"><span class="mw-cite-backlink"><b><a href="#cite_ref-MVTSup_3-0">^</a></b></span> <span class="reference-text"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="http://bitsavers.org/pdf/ibm/360/os/R21.7_Apr73/plm/GY28-6659-7_MVT_Supervisor_PLM_Rel_21.7_May73.pdf"><i>IBM System/360 Operating System - MVT Supervisor</i></a> <span class="cs1-format">(PDF)</span>. Program Logic (Eighth ed.). May 1973. GY28-6659-7<span class="reference-accessdate">. Retrieved <span class="nowrap">March 14,</span> 2022</span>.</cite></span>

</li>

<li id="cite_note-SCB-4"><span class="mw-cite-backlink">^ <a href="#cite_ref-SCB_4-0"><sup><i><b>a</b></i></sup></a> <a href="#cite_ref-SCB_4-1"><sup><i><b>b</b></i></sup></a> <a href="#cite_ref-SCB_4-2"><sup><i><b>c</b></i></sup></a> <a href="#cite_ref-SCB_4-3"><sup><i><b>d</b></i></sup></a> <a href="#cite_ref-SCB_4-4"><sup><i><b>e</b></i></sup></a> <a href="#cite_ref-SCB_4-5"><sup><i><b>f</b></i></sup></a></span> <span class="reference-text"><cite class="citation book cs1"><a rel="nofollow" class="external text" href="http://bitsavers.org/pdf/ibm/360/os/R21.7_Apr73/GC28-6628-9_OS_System_Ctl_Blks_R21.7_Apr73.pdf"><i>IBM System/360 Operating System: System Control Blocks - OS Release 21.7</i></a> <span class="cs1-format">(PDF)</span>. Systems Reference Library (Tenth ed.). IBM. April 1973. GC28-6628-9<span class="reference-accessdate">. Retrieved <span class="nowrap">June 12,</span> 2022</span>.</cite></span>

</li>

</ol></div></div></div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-04-04" href="https://en.wikipedia.org/wiki/?title=Task_Control_Block&oldid=1283961969">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

</div>

</div></div>

</div>

</main>

</div>

</body></html>